基于FPGA的发电机组频率测量计的实现  

Implementation of Frequence Measurement Meter for Generator Unit Based on FPGA

作　　者：刘永军[1] 万频[1] 谢云[1] 

机构地区：[1]广东工业大学自动化学院,510090

出　　处：《微计算机信息》2007年第03Z期200-201,221,共3页Control & Automation

基　　金：广东省科技计划项目资助(编号:2005B10101074);广东省自然科学基金资助(编号:5001818)

摘　　要：利用Verilog HDL硬件描述语言自顶向下的设计方法和Quartus Ⅱ软件,在复杂的可编程逻辑器件(FPGA,Field Pro-grammable Gate Array)中实现了发电机组频率测量计的设计。该设计采用了光电隔离技术,提高了系统可靠性和稳定性。通过仿真,表明这种方法与传统方法设计的数字电子系统相比,便于频率测量范围的扩展,同时其可移植性强、可更改性好。This article realizes the design of frequence measurement meter for generator unit by using Verilog HDL hardware description language with top to down method and software of Quartus Ⅱ ,on the basis of complex programmable logic device （ FPGA ）.This system uses the technique of photoelectric isolation, improving the reliability and stability of the system.Compared with other tradition method in designing the digital electron system by simulation,this method is easily to expand the range of frequence,simuhaneity poses the particular advantage in character of portability and easy-going alternative.

关 键 词：FPGA 发电机组 频率测量计 VERILOG HDL 

分 类 号：TP216[自动化与计算机技术—检测技术与自动化装置]