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机构地区:[1]浙江大学超大集成电路设计研究所,杭州310027
出 处:《半导体技术》2007年第9期771-775,共5页Semiconductor Technology
摘 要:针对亚波长光刻条件下标准单元设计中可能遇到的与物理设计相关的可制造性问题,提出了新的工艺规则和解决方法设计标准单元库。使用分辨率增强技术和光刻模拟仿真,以边缘放置错误值、关键尺寸和版图面积作为评价标准。实例表明,新的工艺规则和方法与生产厂家默认规则相比,在芯片设计初始阶段能够提高产品成品率,有利于缩短设计周期,增强芯片的市场竞争力。基于改进后的0.18μm工艺规则,完成标准单元库的可制造性设计工作,具有良好的应用前景。New physical design rules were implemented in sub-wavelength lithography circumstance to solve the DFM (design for manufacturability) problems in standard cell library design. New physical design rules were proved which were evaluated by EPE (edge-placement errors) or CD (critical dimensions) tolerances and the area of the cell to have better performance in manufacturability and yield on the beginning of IC design process. Based on the new design rules which will shorten design periods and win competition in the market, a set of DFM-friendly 0.18μm standard cells were designed.
分 类 号:TN304.054[电子电信—物理电子学]
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