基于IP核的高速数据采集存储系统设计  

The Design of High-speed Data Acquisition System Based on IP core

作　　者：张帆[1] 赵光恒[2] 苏建[2] 

机构地区：[1]中国科学院空间科学与应用研究中心 [2]中国科学院光电研究院,北京100080

出　　处：《微计算机信息》2007年第29期159-160,312,共3页Control & Automation

摘　　要：本文介绍了一种用于飞行器下传数据处理的高速数据采集存储系统。整个系统的核心,数据接口卡的逻辑设计和PCI总线接口设计均在一片FPGA中实现。数据的传输采用DMA技术进行,在达到较高的传输速率的同时并不占用CPU。基于WDM开发的驱动程序和应用程序使得系统可以稳定运行于Windows2000/XP系统上。经过传输测试,系统的数据传输速率可以达到300Mbps,完全满足设计的要求。This paper mainly introduces a High-speed Data Acquisition System. The most important part of the system is a data acquisition card which is implemented by a FPGA. This card includes a DMA controller which is also implemented in the FPGA, so the data transfer can achieve a high data transfer speed without any control of the CPU. The driver is designed according to the WDM model, so it can work properly under Windows 2000/XP. This system can achieve a high-speed （320Mbps） data transfer in our tests, which completely meet the requirement.

关 键 词：FPGA PCI总线 IP核 DMA控制器 

分 类 号：TP274.2[自动化与计算机技术—检测技术与自动化装置] V557.1[自动化与计算机技术—控制科学与工程]