A Novel Verification Development Platform for Passive UHF RFID Tag  

一种无源UHF RFID电子标签验证开发平台(英文)

作　　者：陈力颖[1] 侯春萍[1] 毛陆虹[1] 吴顺华[1] 徐振梅[1] 王振兴[1] 

机构地区：[1]天津大学电子信息工程学院,天津300072

出　　处：《Journal of Semiconductors》2007年第11期1696-1700,共5页半导体学报（英文版）

基　　金：国家高技术研究发展计划资助项目(批准号:2006AA04A109)~~

摘　　要：This paper introduces a novel verification development platform for the passive UHF RFID tag,which is compatible with the ISO/IEC 18000-6B standard,operating in the 915MHz ISM band. This platform efficiently reduces the design and development time and cost, and implements a fast prototype design of the passive UHF RFID tag. It includes the RFID analog front end and the tag control logic, which is implemented in an Altera ACEX FPGA. The RFID analog front end, which is fabricated using a Chartered 0.35μm two-poly four-metal CMOS process, contains a local oscillator, power on reset circuit, matching network and backscatter, rectifier, regu- lator,AM demodulator, etc. The platform achieves rapid, flexible and efficient verification and development, and can also be fit for other RFID standards after changing the tag control logic in FPGA.提出了一种符合ISO/IEC18000-6B标准的无源UHF RFID电子标签验证开发平台,其工作在915MHzISM频带下.该平台有效减少了设计开发时间及成本,并实现了电子标签的快速原型设计.该平台包括RFID模拟前端以及采用Altera ACEX FPGA实现的标签控制逻辑.RFID模拟前端采用Chartered 0.35μm2P4M CMOS工艺进行流片,包括本地振荡器、时钟产生电路、复位电路、匹配网络和反向散射电路、整流器、稳压器以及AM解调器等.通过调整FPGA中的标签控制逻辑,该平台实现了快速、灵活而高效的RFID验证开发.

关 键 词：verification development platform passive UHF RFID TAG FPGA 

分 类 号：TN409[电子电信—微电子学与固体电子学]