一种新的基于FPGA的小数分频器的参数化设计  

New Parameterized Design of Decimal Fraction Frequency Divider Based on FPGA

作　　者：王建荣[1] 李竹[2] 汤洪明[1] 

机构地区：[1]太原科技大学,太原030024 [2]山西师范大学,山西临汾041004

出　　处：《太原科技大学学报》2007年第3期191-194,共4页Journal of Taiyuan University of Science and Technology

摘　　要：介绍了一种改进的基于FPGA小数分频器的分频原理及电路设计,采用了模块化和参数化的设计方法,利用半整数和整数双模代替原有的整数双模来综合实现小数分频器,由该方案设计的小数分频器,在硬件成本几乎没有增加的情况下,抖动、理论同步周期、最大误差性能方面都有所提高,因此可以广泛应用于数字电路的系统设计中。This paper presents the frequency division theory and circuit design of decimal fraction, frequency divider based on FPGA, which applies the module and parameterization design idea and replaces half-integral frequency and integral frequency of two integral frequencies as double modules. Under the condition of increasing hardware cost hardly, it can be used into the design of digital circuit systems widely, since its jitter, academic synchronous period, maximal error performances and Generality are good.

关 键 词：FPGA VHDL 分频器 抖动 

分 类 号：TP331.2[自动化与计算机技术—计算机系统结构] TN27[自动化与计算机技术—计算机科学与技术]