基于HDMI视频信号接收的电荷泵PLL设计  

Design of the charge pump PLL for visual signal receiving based on HDMI

作　　者：肖剑[1] 李冬仓[1] 孙硕[1] 张福甲[1] 

机构地区：[1]兰州大学微电子研究所,甘肃兰州730000

出　　处：《西安石油大学学报（自然科学版）》2007年第6期96-100,共5页Journal of Xi’an Shiyou University（Natural Science Edition）

摘　　要：介绍了一种实现HDMI中数字视频信号接收的方法,设计并实现了一种新的用于HDMI中像素数据和时钟信号恢复的电荷泵锁相环;通过V-I电路的改进降低了压控震荡器的增益,改善了控制电压的波动对压控震荡器频率的影响,从而减小时钟抖动;采用频率检测电路对输入时钟信号频率进行自动检测分段,可实现大的频率捕获范围,从而实现了对高达UXGA格式的数字视频信号接收;采用Hspice-RF工具对压控震荡器的抖动和相位噪声性能进行仿真,SMIC0.18μsCMOS混合信号工艺进行了流片验证,测试结果表明输入最大1.65Gbit/s像素数据信号条件下PLL输出的时钟信号抖动小于200ps.A method for the implementation of the digital visual signal receiving in HDMI is introduced,and a solution for HDMI receiver,design and realized a new kind of the charge pump PLL for the data and clock recovery.The change of VCO frequency caused by the control voltage ripple and the clock jitter are reduced through the improved V to I circuit that can get a low gain of VCO.The input clock can be automatic detected and divided into three segment,fulfilled the high frequency capture range,thus can supports display resolution up to UXGA pixel format.The jitter and phase noise of VCO are simulated by Hspice-RF.The PLL fabricated by SMIC 0.18μs CMOS process,test result show that the jitter of output system clock is less than 200 ps on the condition of inputting maxim 1.65 Gbps pixel data signal.

关 键 词：高清晰度多媒体接口(HDMI) 锁相环 频率捕获 过采样 

分 类 号：TN949.17[电子电信—信号与信息处理]