薄膜全耗尽CMOS/SOI器件研究  

A study on fully-depleted SOICMOS devices

作　　者：颜志英[1] 王雄伟[1] 丁峥[1] 

机构地区：[1]浙江工业大学信息工程学院,浙江杭州310032

出　　处：《浙江工业大学学报》2007年第6期650-653,共4页Journal of Zhejiang University of Technology

基　　金：浙江省自然科学基金资助项目(Y105607)

摘　　要：在对全耗尽SOIMOS器件进行了大量研究的基础上,采用金属栅工艺,并采用了LDD结构以减小热载流子效应,防止漏的击穿,还采用了突起的源漏区,以增加源漏区的厚度并减小源漏区的串联电阻,以增强器件的电流驱动能力,降低了寄生电阻,减小了静态功耗.实现了性能优良的全耗尽金属栅FD SOICMOS器件.与常规工艺的器件相比,提高了输出驱动电流,也改善了器件的亚阈值特性,特别是在沟道掺杂浓度比较低的情况下能得到非常合适的阈值电压.NMOS器件的饱和电流为0.65 mA/μm;PMOS器件的饱和电流为0.35 mA/μm.Based on the extensive research of fully depleted SOIMOS device,a new SOIMOS device with TiN gate and LDD structure to reduce hot-carrier effects and prevent leakage to be breakdown is developed.The new device has also adopted the protuberant source leakage in order to increase the thickness of source leakage,reduce the series resistance,enhance the electric current drive capacity,reduce the parasitic resistance,and reduce the static power consumption.A good performance of the entire metal gate FD SOICMOS depletion device is achieved.Comparing with the device under conventional procedure,the new device can raise the output drive electric current and improve the device＇s subthreshold characteristics.Particularly in the relatively low channel doping concentration circumstances,the new device can get very suitable threshold voltage.The saturation current of NMOS and PMOS is 0.65 mA/μ m 0.35 mA/μ m respectively.

关 键 词：双多晶硅栅 LDD结构 SOICMOS器件 

分 类 号：TN326[电子电信—物理电子学]