一种CMOS混合信号电路衬底噪声耦合模型  

A Substrate Noise Coupling Macro-model for CMOS Mixed-signal ICs

作　　者：朱樟明[1] 杨银堂[1] 付晓东[1] 

机构地区：[1]西安电子科技大学微电子研究所,西安710071

出　　处：《固体电子学研究与进展》2007年第4期519-523,共5页Research & Progress of SSE

基　　金：国家自然科学基金(60476046;60676009);教育部博士点基金(20050701015);国家部委基金(51408010205DZ0164);西安市AM基金(XA-AM-200502)资助项目

摘　　要：利用二维器件模拟器MEDICI提取出重掺杂外延型衬底的电阻宏简化模型,所需的6个参数均可通过器件模拟得到,能够精确表征混合信号集成电路中的衬底噪声特性。基于0.25μm CMOS工艺所建立的电阻宏模型,设计了简单的混合信号电路进行应用验证,证明了该模型能够有效表征混合信号集成电路的衬底噪声。A resistance macro-model of heavily doped epi-substrate is extracted by the 2-d device simulator MEDICI. The model requires only 6 parameters which can be extracted from a few of simple device simulations. This model can characterize the substrate noise in the mixed signal ICs accurately. Modeling is performed for the 0.25 μm CMOS technology and the resulting model is applied to the circuit. Finally, a comparison is made between the simulation results and the test results, and the substrate noise coupling model has been verified.

关 键 词：衬底噪声 混合信号集成电路 电阻宏模型互补 金属氧化物半导体 

分 类 号：TN402[电子电信—微电子学与固体电子学]