高速采样自适应滤波系统的集成设计与仿真  

Integrated Design and Simulation of High-speed Sampling and Adaptive Filtering System

作　　者：高金定[1] 侯玉宝[1] 刘雄飞[2] 

机构地区：[1]湖南涉外经济学院电气与信息工程学部,湖南长沙410205 [2]中南大学物理学院,湖南长沙410083

出　　处：《探测与控制学报》2007年第6期24-27,共4页Journal of Detection & Control

基　　金：湖南省教育厅资助科研项目资助(07C421)

摘　　要：针对用分立器件构建的高速采样自适应滤波系统容易产生串扰等问题,提出了一种基于片内异步FIFO的集成设计方案。采用双通道高速AD器件AD9238作为输入级,用异步FIFO作缓存,用FPGA进行采样滤波控制。将异步FIFO、采样滤波控制器及自适应滤波器集成在同一FPGA上,并给出了电路图,实现了采样、自适应滤波的高速匹配控制,并在QuartusII软件上进行了仿真。结果表明:该方案既能有效地降低高频可能引起的串扰,又能降低系统的成本。Aiming at the crosstalk problems in adaptive filtering system based on separated apparatus, a highspeed sampling and adaptive filtering system based on asynchronous FIFOs was put forward. The dual channels AD converter AD9238 was used as input stage, two asynchronous FIFOs on-chip were used as high-speed buffer memory,and the sampling and adaptive filtering were controlled by FPGA. The sampling and filtering controller, two asynchronous FIFOs and the adaptive filter were integrated on a chip at last. The high-speed matching controlling of sampling and adaptive filtering was implemented. The whole design was simulated by using Quartus Ⅱ. Results indicate that it could reduce not only interfere caused by high frequency,but also the cost of the system.

关 键 词：自适应滤波器 异步FIFO 高速采样 集成设计 

分 类 号：TM933[电气工程—电力电子与电力传动]