用于谐波检测中的数字低通滤波器的设计  

Design of Digital Low-pass Filter in Harmonic Detection

作　　者：曾菊容[1] 杨小雪[1] 

机构地区：[1]西南交通大学信息科学与技术学院,四川成都610030

出　　处：《现代电子技术》2008年第3期103-105,共3页Modern Electronics Technique

摘　　要：有源电力滤波器谐波检测中数字低通滤波器的设计是关键。通过选用现场可编程逻辑器件(FPGA)确定了数字低通滤波器的硬件实现方案,并按照层次化、模块化、参数化的设计思路,采用VHDL硬件描述语言进行了硬件设计,并进行了仿真验证,为有源电力滤波器谐波检测中低通滤波器设计提供了参考。The key of active power filter harmonic detection is the design of digital low- pass filter. In this paper,a scheme of hardware implementation of digital low - pass filter is worked out by selecting FPGA, From the clew of implementing a stratified,modularized and parameterized design, the thesis describes the hardware implementation of digital low - pass filter with VHDL,the design is simulated and show that it is correct and provide reference to the design of digital low- pass filter of active power filter harmonic diction.

关 键 词：有源电力滤波器 谐波检测 数字低通滤波器 FPGA VHDL 

分 类 号：TN713[电子电信—电路与系统]