LSE:一种处理器体系结构软件仿真器开发工具  

LSE:A Development Tool for Computer Architecture Simulator

作　　者：喻之斌[1] 金海[1] 

机构地区：[1]华中科技大学计算机学院,武汉430074

出　　处：《计算机科学》2008年第2期282-285,共4页Computer Science

摘　　要：在现代处理器体系结构设计中,利用软件仿真技术对设计结果进行验证是最重要的方面之一。然而,处理器体系结构仿真器的开发是一个非常困难的过程。主要的困难表现在三个方面:第一,目前用于处理器体系结构仿真器开发的编程语言如C或C++语言都是串行执行的语言,而处理器的各部件是可以并行运行的,使用串行编程语言编程来模拟并行执行的部件需要长时间的、仔细的程序功能与部件功能的匹配工作,并且容易出错;第二,使用串行程序来模拟并行部件的运行,模拟速度很低,并且仿真速度低是处理器体系结构软件仿真器开发领域的瓶颈问题;最后,仿真器仿真结果的可信度低也是一个关键问题。本文首先介绍了一种新的处理器体系结构软件仿真器开发工具,然后深入分析了该开发工具的优点和缺点,最后对该仿真器开发环境提出了改进方案。Software simulation is one of the most important aspects in modem processor architecture design, which is used to verify design results. However, it is very difficult to develop a processor architecture simulator. Three factors contribute to this difficulty. Firstly, the programming languages such as C or C＋＋ used for developing processor architecture simulators are sequential while the components of a processor can run concurrently. The procedure mapping the sequential program to concurrently running components is time-consuming, difficult and error prone. Secondly, the simulation speed of simulators which are developed by sequential programming languages is very low and this is the bot- tle neck in processor architecture simulation field. Lastly, the high error ratio of the results of a simulator is also a key issue. In this paper, we firstly introduced a new development tool for computer architecture simulators. Then, the advantages and disadvantages of this tool are deeply analyzed. In the end, we come up with a proposal to ameliorate the development tool.

关 键 词：处理器 体系结构 仿真技术 LSE 

分 类 号：TP311.131[自动化与计算机技术—计算机软件与理论] TP368.1[自动化与计算机技术—计算机科学与技术]