基于PowerPC的嵌入式MPEG4视频解码器的设计与实现  

Design and implementation of embedded MPEG4 video decoder based on powerPC processor

作　　者：刘振彪[1] 肖国强[1] 武兵[2] 

机构地区：[1]西南大学计算机与信息科学学院,重庆400715 [2]德州学院计算机系,山东德州253023

出　　处：《计算机工程与设计》2008年第6期1384-1386,1390,共4页Computer Engineering and Design

摘　　要：阐述了XILINX公司Virtex II Pro系列FPGA的硬件结构,介绍了MPEG4SP及其解码过程。以ML310开发板为平台,利用Virtex II Pro系列的XC2VP30芯片实现了基于PowerPC405的嵌入式MPEG4 SP视频解码器。通过对硬件的配置和软件的优化,使系统能够完成QCIF格式的视频序列实时解码。The hardware structure of the XILINX Virtex II Pro series FPGA,and MPEG4 SP and its decoding process are introduced.With the development platform of ML310,a MPEG4 SP decoder is implemented based on the powerPC405 embedded processor,which is in the XC2VP30 chip of the Virtex II Pro series.The system can run in real time to decode QCIF video after the configuration of hardware and software are optimized.

关 键 词：嵌入式系统 视频解码器 纹理解码 可变长解码 运动补偿 

分 类 号：TP368[自动化与计算机技术—计算机系统结构]