500V体硅N-LDMOS器件的研究  

Research on the 500 V Bulk-Silicon N-LDMOS

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作  者:李栋良[1] 孙伟锋[1] 

机构地区:[1]东南大学集成电路学院,南京210096

出  处:《电子器件》2008年第2期508-510,515,共4页Chinese Journal of Electron Devices

摘  要:借助半导体工艺模拟软件Tsuprem4和Medici,对耐压500V的体硅N-LDMOS器件进行详细模拟。在模拟过程中,综合考虑了内场限环和场极板技术来弱化表面栅场板边缘和漏端的峰值电场,分析了场限环的长度,注入剂量等参数对耐压的影响。优化后该器件表面电场分布良好,通过I-V曲线可知,关态和开态耐压均超过500V,开启电压在1.65V左右,可以很好应用于各种高压功率集成芯片,具有很好的发展前景。A study on the 500 V bulk-silicon N-LDMOS is presented, which is simulated by using the semiconductor device simulator Tuprem4 and Medici. During the simulation process, we use the single internal field ring and field plate to reduce the peak voltage which may appear on the edge of gate field plate and the drain area, and also analyze the relations of the breakdown voltage to the position and concentration of the internal field ring and so on. After the optimization on these parameters of the N-LDMOS, both of the surface potential and electrical field distribute well, we can see from the I-V characteristic curves that both of the off-state and on-state breakdown voltage of the given N-LDMOS device exceed 500 V, the threshold voltage can reach 1.65 V. The presented N-LDMOS have a good future to be applied in the high voltage POWER IC for its simple process.

关 键 词:N-LDMOS 内场限环 场极板 漂移区 击穿电压 体硅 

分 类 号:TN432[电子电信—微电子学与固体电子学]

 

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