基于ARM7TDMI的TLB组织结构及存储保护设计  

TLB Structure and Memory Access Protection Design Based on ARM7TDMI

作　　者：张启晨[1] 洪俊峰[1] 刘新宁[1] 张萌[1] 

机构地区：[1]东南大学国家专用集成电路系统工程研究中心,南京210096

出　　处：《电子器件》2008年第2期705-708,共4页Chinese Journal of Electron Devices

摘　　要：基于ARM7TMDI嵌入式处理器内核设计了一种兼容ARM720T存储管理机制的转换后备缓冲器(TLB)组织结构,建立了TLB的Verilog仿真模型,设计了相对应的存储保护模块。该TLB采用64页表项全关联结构,同时支持多种页转换方式和页表项命中控制,并且通过复用设计节省了硬件资源。通过整合TLB、存储保护模块和ARM7TMDI的仿真模型,采用VCS仿真软件进行仿真验证,结果证实了设计的有效性和正确性。Based on the ARM7TDMI embedded processor, a TLB structure compatible with memory management mechanism of ARM720T is designed. A TLB simulation model is established with a corresponding memory access protection module designed. The proposed TLB is constructed as a 64-entry fully-associative structure with multiple-page translation and hit-control function supported. Multiplexing design is used to avoid the excessive occupation of die area. Combining the simulation model of TLB, memory access protection module and ARM7TDMI,the simulation results produced by VCS prove the validity and correctness of the design

关 键 词：TLB 存储管理 存储保护 ARM7TDMI 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]