DSP Builder在数字信号处理中的应用  

Application of DSP Builder in Digital Signal Processing

作　　者：李云飞[1] 同晓荣[1] 

机构地区：[1]渭南师范学院计算机科学系,陕西渭南714000

出　　处：《渭南师范学院学报》2008年第2期62-65,共4页Journal of Weinan Normal University

基　　金：渭南师范学院科研基金资助项目(07YKF013)

摘　　要：目前数字信号处理(DSP)技术发展迅猛,在电子、通信、航天等领域DSP技术都有着十分广泛的应用.以往设计人员在进行DSP系统设计时通常采用DSP处理器或在FPGA上通过硬件描述语言(VHDL)实现,设计难度大,开发周期长.本文介绍的DSP Builder是Altera公司推出的一个DSP开发工具,允许设计者在Matlab中完成算法设计,在Simulink软件中完成系统集成,然后通过SignalCompiler模块生成Quartus II软件中可以使用的硬件描述语言文件,通过综合仿真后下载到FPGA芯片内,从而完成系统设计.与以往基于硬件语言的设计相比,这种设计流程更快、更容易.The digital signal processing （DSP）technology has rapidly developed at present and it has widely used in electronic, communication and airspace. DSP designers usually adopte DSP processor or hardware describe language （HDL） at FPGA in their design several years ago. The paper briefly introduces DSP Builder that is a DSP develop tool, which can allow designers completing algorithm design in Matlab and system integration in Simulink, finally making HDL file used in Quartus II by Signal Compiler block. DSP designers can use the HDL file to accomplish their design through synthesis simulation and download in FPGA. The design flow is faster and simpler compared with design based on HDL.

关 键 词：信号处理 仿真 DSP FPGA VHDL SOPC 

分 类 号：TN911.72[电子电信—通信与信息系统]