基于CPLD的直流无刷电机驱动电路设计  

A Drive Circuit Design for BLDC Motor Based on CPLD

作　　者：谈振藩[1] 林荣森[1] 王洪波[1] 郭立东[1] 

机构地区：[1]哈尔滨工程大学自动化学院,黑龙江哈尔滨150001

出　　处：《现代电子技术》2008年第8期4-6,8,共4页Modern Electronics Technique

摘　　要：介绍一种基于CPLD(复杂可编程逻辑器件)的直流无刷电机驱动电路,给出驱动电路的软硬件设计用软件代替逻辑门实现电机的保护逻辑。采用EPM7064SLC-44-10 CPLD为核心控制器,实现电机驱动所需的换相译码、死区发生器和IPM(智能功率模块)接口电路。系统软件采用VHDL语言编程,代替原来的RC电路实现的死区时间发生器。该电路具有体积小、调试方便、死区时间设置灵活等优点。This paper presents a drive circuit for BLDC motor based on CPLD. Its hardware and software design are described in detail, to realize motor protection by using software instead of logic gate. The phaseswitch coding, dead time gener-ator and IPM interface circuit are implemented by using the EPM7064SLC - 44 - l0 CPLD as the central controller. The software design is implemented by VHDL,instead of RC to realize clead time generator. The design has advantages of small size, convenient debugging and flexible dead time.

关 键 词：CPLD 直流无刷电机 死区发生器 IPM VHDL 

分 类 号：TP274.53[自动化与计算机技术—检测技术与自动化装置]