一种3～5GHz连续增益可调CMOS超宽带LNA的设计  

Design of a Continuous Variable Gain CMOS LNA for 3-5 GHz UWB Wireless Application

作　　者：杨凯[1] 王春华[1] 戴普兴[1] 

机构地区：[1]湖南大学计算机与通信学院,长沙410082

出　　处：《微电子学》2008年第2期275-279,共5页Microelectronics

基　　金：国家自然科学基金资助项目(60676021)

摘　　要：提出了一种具有大范围连续增益变化的3～5GHzCMOS可调增益低噪声放大器。采用两级共源共栅电路结构，二阶切比雪夫滤波器作为输入，源跟随器作为输出，在带内获得了良好的输入输出匹配和噪声性能。通过控制第二级的偏置电流，获得了36dB的连续增益可调，同时也不影响输入输出匹配。该电路基于TSMC0．18脚CMOS工艺，在最高增益时，输入和输出反射系数511和52z分别小于-10．1dB和-15dB，最高增益达到23．8dB，最小噪声系数仅为1．5dB，三阶交调截点为-7dBm，在1．2V电压下，功耗为6．8mW；芯片面积0．71mm^2（0．96mm×0．74mm）。A two-stage CMOS variable gain LNA （VG-LNA） with large and continuous gain variation for 3-5 GHz was presented. A 2nd-order Chebyshev filter was used to achieve excellent input match in the band and to optimize the noise performance. A source-follower was designed to match output. By controlling the bias current of the second stage, a continuous gain tuning range of 45 dB was achieved without influencing input and output matches. Simulation based on TSMC’s 0. 18 μm CMOS process showed that the VG-LNA had an S11 and S22 less than -10. 1 dB and -15 dB, respectively, for maximum gain, which was 23. 8 dB, a minimum noise figure of 1. 5 dB, and an input-referred third-order intercept point of -7 dBm, while dissipating 6. 8 mW of power from a 1.2 V supply. The chip size is 0. 71 ram2 （0. 96 min×0.74 mm）.

关 键 词：低噪声放大器 超宽带 共源共栅 增益可调 CMOS 切比雪夫滤波器 

分 类 号：TN722.3[电子电信—电路与系统]