浮点协处理器在嵌入式组合导航计算机中的应用研究  

Floating-Point Auxiliary Processor and Its Application in Embedded Integrated Navigation Computer

作　　者：孙炼[1] 赵伟[1] 刘建业[1] 

机构地区：[1]南京航空航天大学导航研究中心,江苏南京210016

出　　处：《计算机测量与控制》2008年第4期555-557,共3页Computer Measurement &Control

摘　　要：为了提高导航计算机的浮点运算性能,满足组合导航系统实时性的要求,在基于FPGA的嵌入式导航计算机中,利用新型FPGA的片内逻辑资源,设计出专门用于浮点运算的协处理器单元,实现了组合导航浮点运算的硬件执行。为了使浮点运算协处理器的性能充分发挥,对组合导航软件的代码进行了优化。实现了嵌入式导航计算机硬件和软件性能同步提高。使用真实导航数据进行了测试,结果表明,系统的浮点运算性能大大提升,达到了预期的实时性能改善效果。To improve the floating-point arithmetic performance of Navigation Computer, and to meet the requirement of real-time performance of integrated navigation system, a navigation computer with floating-point auxiliary processor is proposed. Using rich internal logic resources in a new model FPGA chip, the navigation software is revised to fit the auxiliary processor. The performance of embedded navigation computer is promoted both in hardware and software. Using real navigation data, the test results demonstrate the good effects on real-time performance and the system runs steadily.

关 键 词：浮点运算 协处理器 导航计算机 FPGA 

分 类 号：V249.32[航空宇航科学与技术—飞行器设计]