基于FPGA的数字滤波器的设计与实现  

Design of FIR Filter Based on FPGA

作　　者：陆宇鹏[1] 邱宏安[1] 田多华[1] 邵立群[1] 

机构地区：[1]西北工业大学航海学院,陕西西安710072

出　　处：《电声技术》2008年第5期23-25,28,共4页Audio Engineering

摘　　要：提出了一种基于FPGA的FIR线性相位滤波器设计方案,充分利用FPGA四输入查找表LUT结构构成向量乘法器,给出了对应的VHDL源程序及仿真结果,并讨论了设计误差原因及改进措施。与普通滤波器相比,基于查找表的FIR滤波器具有速度快、占用资源少的特点。采用流水线技术对加法运算进行处理,速度进一步提高。The design scheme of FIR linearity phasic digital filter based on FPGA is introduced. The FPGA four import LUT configuration is used to make up of vector multiplication, and the VHDL source program and simulating results are given. The design error cause and improving measure are discussed. Compared with common filter, the filter based LUT has the advantages of quick speed and less resource. The production line technology is employed to carry out treatment on addition arithmetic, and to improve speed.

关 键 词：FPGA FIR滤波器 VHDL 四输入查找表 

分 类 号：TN713[电子电信—电路与系统]