一种高速图像采集装置的设计  

Design on a High-Speed Image Collecting System

作　　者：李长乐[1] 臧希喆[1] 赵杰[1] 

机构地区：[1]哈尔滨工业大学机器人研究所,黑龙江哈尔滨150080

出　　处：《石油化工高等学校学报》2007年第3期101-104,共4页Journal of Petrochemical Universities

基　　金：长江学者和创新团队发展计划资助(IRT0423)

摘　　要：设计了一种基于NIOSⅡ软核处理器为系统控制核心,以高速线阵CCD为图像采集器件、以SDRAM存储器为图像缓冲存储器的高速图像采集系统。采用数字技术实现了图像信号处理与数据采集、CCD降噪的算法以及对图像缓冲存储器的控制。采用EDA仿真及综合工具,对所设计的电路进行了仿真、编程和硬件调试。设计实现了一种高速图像采集装置,并且简化了系统的硬件结构,提高了装置的实时性。The high--speed image collecting system with NIOS II soft--core processor as key component, high--speed line array CCD as image collecting component, SDRAM memory as image data buffer storage was designed. Image signal processing and data collection, noise reduction algorithm and control to image data buffer storage can be realized by digital technology. The above system has been simulated successfully by EDA software after programming and debugging with FPGA chip. Finally, system test shows that the designed system in high speed image collection is effective, and the system hardware structure is simple, well as the real--time performance is improved greatly.

关 键 词：高速线阵CCD FPGA 图像采集 

分 类 号：TN911.73[电子电信—通信与信息系统] TP274.2[电子电信—信息与通信工程]