FPGA片上集成缓存在采集系统中的应用  

Application of Buffer Integrated in FPGA

作　　者：刘鑫[1] 董增寿[1] 

机构地区：[1]太原科技大学电子信息工程学院,030024

出　　处：《微计算机信息》2008年第17期233-235,共3页Control & Automation

基　　金：山西省自然科学基金(2007011048)

摘　　要：随着测试环境越来越复杂,需要采集的参数种类越来越多,要求采集系统连续采集各种传感器输出的模拟信号,而目前常用的固态存储器件FLASH的写入速率比较低。本文提出一种基于FPGA(现场可编程门阵列)片上集成的高速FIFO实现采集数据的高速缓存并通过对高速FIFO的读写操作实现总线同步数据传输,提高数据的传输速率。With the increasingly complicated of the test environment, more and more acquisition parameters are needed. Acquisition unite acquires the analog signals which are exported by each sensors. But recently, the speed of writing for solid-state memory device FLASH is low. This paper presents synchronous FIFO integrated in FPGA which can achieve the function of high-speed buffer and bus synchronous data transmission by high-speed reading-writing operation of the FIFO.

关 键 词：高速缓存 现场可编程门阵列 实时采集 同步传输 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]