MPEG-4形状编码器模式选择模块的VLSI结构设计  

VLSI Architecture Design of Mode Decision in MPEG-4 Shape Codec

作　　者：王占辉[1] 刘大明[1] 

机构地区：[1]海军工程大学电气与信息工程学院,武汉430033

出　　处：《电子器件》2008年第4期1167-1171,1176,共6页Chinese Journal of Electron Devices

摘　　要：阐明了所设计的模式选择的VLSI硬件结构。首先介绍了MPEG-4形状编码中Mode Decision的基本原理,并对在Mode Decision中大量使用的ACQ函数进行化简,在保持计算精度的同时减少了硬件实现所耗费的资源,降低了电路复杂度。接着通过对MPEG-4校验模型中模式选择伪码的分析,将整个Mode Decision模块划分为4个子模块并分别设计其VLSI结构并实现。最后硬件仿真结果与软件运行结果的对比表明了本设计的正确性,综合结果也说明了本设计可以在最低0.97MHz的频率下满足MPEG-4Core Profile&Level2的实时编码,可用于MPEG-4的VLSI实现。The VLSI architecture of Mode Decision in MPEG-4 shape coding is presented. Firstly,the theoretic principle of Mode Decision in MPEG-4 shape coding is introduced. The ACQ function used largely in Mode Decision is simplified so that hardware source can be decreased in retaining the computing precision. Secondly, the pseudo code of Mode Decision used in MPEG-4 shape coding is analyzed and the whole module of Mode Decision is divided into five sub-modules and the VLSI architecture of each sub-module is designed. Finally, the VLSI architecture and implementation in terms of VHDL were designed in the Xilinx ISE6. li environment and some simulations were carried out in tools of EDA. The experimental results showed that the VLSI processor designed can perform correct logic functions and can achieve a real-time coding for MPEG-4 Core Profile and Level 2 under a relatively low running frequency.

关 键 词：MPEG-4 形状编码器 模式选择 超大规模集成电路 

分 类 号：TN47[电子电信—微电子学与固体电子学]