一种改进的STUMPS架构  

Improvement of STUMPS

作　　者：陈建慧[1] 

机构地区：[1]无锡职业技术学院

出　　处：《无锡职业技术学院学报》2008年第4期55-58,共4页Journal of Wuxi Institute of Technology

摘　　要：由于科学技术的快速提高,单一芯片中所能包含的晶体管的数目越来越多,相对造成了芯片可测试度的降低,以及测试成本的增加。传统的STUMPS-based LBIST测试方法中,常会有故障覆盖率不够高和测试时间太长的缺点。该文提出了用Test-Per-Clock的方式来处理待测电路,并配合空间压缩器和存储装置使用,降低了故障覆盖率,减少了测试时间。Due to the fast improvement of process technology, the number of transistors continuously increases in a chip decreasing the testability and increasing the testing cost. The conventional STUMPS - based L - BIST way has some disadvantages. One is fault coverage rate not good enough, and the other is the test time too long. In the paper, the author tries to test the CUT with Test - Per- Clock, space compression and storage device. So we can get rather high fault coverage rate in very short test time.

关 键 词：内建自测试 多输入特征寄存器 线性反馈移位寄存器 

分 类 号：TN47[电子电信—微电子学与固体电子学] TP368.32[自动化与计算机技术—计算机系统结构]