高介电栅介质材料研究进展  

Development of High-K Gate Dielectric Materials

作　　者：武德起[1] 赵红生[1] 姚金城[1] 张东炎[1] 常爱民[1] 

机构地区：[1]中国科学院新疆理化技术研究所

出　　处：《无机材料学报》2008年第5期865-871,共7页Journal of Inorganic Materials

基　　金：国家自然科学基金(50372083);中国科学院知识创新工程青年人才领域前沿项目(072C201301)

摘　　要：传统的栅介质材料SiO_2不能满足CMOS晶体管尺度进一步缩小的要求,因此高介电栅介质材料在近几年得到了广泛的研究,进展迅速.本文综述了国内外对高介电材料的研究成果,并结合作者的工作介绍了高介电栅介质在晶化温度、低介电界面层、介电击穿和金属栅电极等方面的最新研究进展.The traditional gate dielectric material of SiO2 can not satisfy the need of the continuous downscaling of CMOS dimensions. High-K gate dielectric materials have attracted extensive research efforts recently and obtained great progress. In this paper, the developments of high-K gate materials were reviewed. Based on the author＇s background and research work in the area, the latest achievements of high-K gate dielectric materials on the recrystalization temperature, the low-K interface layer, and the dielectric breakdown and metal gate electrode were introduced in detail.

关 键 词：高介电栅介质 晶化温度 低介电界面层 金属栅电极 

分 类 号：TN304[电子电信—物理电子学] TN386