一个过采样增量－总和调制器的设计与实现  

Design and Implementation of an Oversampled Sigma－Delta Modulator

作　　者：缪国清[1] 徐国庆[1] 唐璞山[1] 

机构地区：[1]复旦大学电子工程系CAD室

出　　处：《电子学报》1997年第11期6-10,31,共6页Acta Electronica Sinica

摘　　要：本文设计实现了一个高精度的双通道过采样Ａ／Ｄ电路，它采用由两个二阶调制器级联实现的四阶增量－总和调制器结构，并通过优化调制器内部各级增益，在改善过采样Ａ／Ｄ的大信号过载特性的同时提高其最大输出信嗓比．为降低数字开关噪声对过采样Ａ／Ｄ性能的影响，本文采用了一种低噪声电流控制逻辑设计数字电路．实验芯片的测试结果表明，在６４倍的过采样率下，电流控制逻辑通道和静态ＣＭＯＳ逻辑通道分别获得了９１ｄＢ和８４．５ｄＢ的输出动态范围．This paper describes the design and implementation of a dual channel oversampled A/D converter. The converter uses a cascaded 4th order sigma-delta modulator. Through the modification of modulator's interstage gains,the modulator' large signal overload problem is alleviatednd the maximum output signal to noise ratio is increased. A low noise current-steering logic is introduced to replace static CMOS for digital circuit design,which reduces the digital switching noise coupling in the A/D converter.The experimental chip is fabricated in 3μm CMOS technology. Test results show that, with a oversampling ratio of 64,a 91dB and 84.5dB dynamic range for two channels is achieved which uses current-steering logic and static CMOS respectively.

关 键 词：过采样 增量-总和 调制器 低噪声 设计 

分 类 号：TN761.91[电子电信—电路与系统]