嵌入式计算机的BIT设计与实现  

Design and Implementation of BIT for Embedded Computer

作　　者：刘少雄[1] 喻卫东[1] 

机构地区：[1]华东计算技术研究所,上海200233

出　　处：《计算机工程》2008年第B09期115-116,119,共3页Computer Engineering

摘　　要：依据嵌入式计算机组成特点,在可测试性设计中采用层次式测试硬件结构,通过分布式测试控制管理,实现从器件级、模块级到子系统级、系统级的逐级测试。在BIT测试中,以CPU测试为例解析了测试用例数据、用例过程、执行控制和判决的组织与实现。According to the characters of embedded computer, this paper adapts the hierarchy structure for testing hardware in DFT, and implements the self-test under the management of distributed test control, from chip-level, module-level to subsystem-level, system-level. As an example for BIT design, this paper gives CPU test, explains the organization and implementation of test case data, test case procedure, execution control and test decision.

关 键 词：可测试性设计 机内测试 测试用例 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]