32位嵌入式CPU的微体系结构设计  

Design of Micro-architecture of 32-bit Embedded CPU

作　　者：马鹏[1] 卢景芬[1] 龚令侃[1] 

机构地区：[1]华东计算技术研究所,上海200233

出　　处：《计算机工程》2008年第B09期136-138,共3页Computer Engineering

摘　　要：介绍一款自主设计的嵌入式CPU的微体系结构,给出流水线的设计、分支预测的策略、乱序执行指令的顺序提交、精确异常等议题。提出了CPU内5个执行单元的功能,以及CPU的存储子系统。目前该CPU的前端设计已经完成并通过了FPGA验证。This paper proposes micro-architecture of an embedded CPU, puts forward the design of the pipeline, branch p^ediction, out-of-order execution, in-order completion, and precise interrupt. The introduction of 5 functional units and the memory management of the CPU are also provided. The t^ont-end design of CPU has been completed and has been verified on an FPGA prototype.

关 键 词：微体系结构 超标量技术 分支预测 精确异常 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]