基于FPGA的高压共轨柴油机ECU的硬件设计  

Hardware Design of ECU in High Pressure Common Rail Diesel Based on FPGA

作　　者：李珩[1] 欧阳光耀[1] 

机构地区：[1]海军工程大学船舶与动力学院,武汉430033

出　　处：《武汉理工大学学报（交通科学与工程版）》2008年第5期917-920,共4页Journal of Wuhan University of Technology（Transportation Science & Engineering）

基　　金：国防"十五"预研项目资助(批准号:401010401)

摘　　要：采用现场可编程门阵列(field programmable gate array,FPGA),设计了实用化的高压共轨柴油机电控单元(electronic control unit,ECU)硬件,将大部分控制时序集成在FPGA器件内部,采用硬件电路构建,使系统的控制精度和响应速度得到了跃升,同时还提高了系统的可靠性和抗干扰能力.柴油机台架试验表明,该系统性能优良,运行稳定.This article applies large-scale programmable logical device FPGA （field programmable gate array） to the design of ECU in the High Pressure Common Rail Diesel. By integrating the control schedule within the FPGA and constructing the hardware electrocircuit, which beyond the traditional way, the design not only increases the control accuracy and response speed, but also improves the anti-jamming ability and reliability of the whole system. At last, according to the diesel experiment conclusion, the paper proves that the system is able to control the fuel burning of the high pressure common rail diesel accurately and it runs stably.

关 键 词：柴油机 高压共轨 ECU FPGA 

分 类 号：U464.172[机械工程—车辆工程]