语音MFCC特征提取的FPGA实现  

Implementation of MFCC extraction in speech recognition based on FPGA

作　　者：谢秋云[1] 肖铁军[1] 

机构地区：[1]江苏大学计算机科学与通信工程学院,江苏镇江212013

出　　处：《计算机工程与设计》2008年第21期5474-5475,5493,共3页Computer Engineering and Design

摘　　要：提出了在FPGA上实现语音MFCC特征提取的方法,巧妙设计了FFT、三角滤波、取对数和DCT的硬件结构,采用多时钟、状态机、模块复用、IP核和多级流水技术,大大提高了运算速度,实验表明与软件相比,结果误差在1%以内,50M时钟频率下每秒语音数据计算时间仅为8.5 ms,与VQ、HMM结合后,对系统识别率影响可以忽略,达到了嵌入式实时系统的应用要求。A method of MFCC extraction based on FPGA is presented. The hardware structure are designed skillfully of FFT, triangular filter, logarithm and DCT. Many techniques are used to obtain high speed, such as multiply clock, FSM, module reuse, IP core, and multiply pipeline. Experimental results show that the time of MFCC extraction per-second under 50M clock is only 8.5ms, and the percent error of final result is less than 1% compared with software, after combination with VQ and HMM, the effect on recognition rate is neglected. So it will fully meet the requirements of real-time embedded systems.

关 键 词：MFCC FPGA 语音识别 特征提取 嵌入式计算 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]