标准单元可制造性分级  

Standard Cell DFM Grading

作　　者：张子文[1] 龚敏[1] 陈岚[2] 

机构地区：[1]四川大学物理科学与技术学院微电子技术四川省重点实验室四,川成都610064 [2]中国科学院微电子研究所共性技术研究室,北京100029

出　　处：《现代电子技术》2008年第24期34-36,共3页Modern Electronics Technique

摘　　要：随着制造工艺尺寸的缩小,可制造性不只是工厂需要关注的问题,更是设计者需要考虑的重点,从而提高良率和版图面积的利用率。为了使设计者更好地理解和控制可制造性,对标准单元的可制造性分级显得尤为重要。用加权重的方法对标准单元进行可制造性分级,该方法不但包含可制造性规则对版图的约束,还创新性地把工艺参数变化对其造成的影响考虑了进去。用一套简化的可制造性规则和版图来演示此种分级方法的实现,并用模拟结果验证了它的有效性。该分级方法具有统一性和标准性,可以被广泛采用。In order to improve the yield and productivity, both foundry and circuit designers should consider the Design for Manufacturability （DFM） as process geometric shrink. Therefore,grading standard cell seems more urgent and important to help designers understand and control DFM. This paper uses weighting approach to grade standard cell. This new method in eludes both design rule restriction and process parameter affect. This paper uses a set of simplified DFM rules and layout to implement the grading approach. Then it uses litho - simulation to validate the effectiveness of this approach. This grading method is unified and standardized,so it can be wildly used.

关 键 词：可制造性 标准单元 权重 光刻模拟 

分 类 号：TN40[电子电信—微电子学与固体电子学]