数字逻辑电路实验系统设计与开发  

Design and Development of Digital Logic Circuit Experimental Systems

作　　者：王勇[1] 

机构地区：[1]复旦大学信息科学与工程学院电子工程系,上海200433

出　　处：《实验室研究与探索》2008年第12期42-44,共3页Research and Exploration In Laboratory

摘　　要：论文着重介绍了数字逻辑电路实验系统设计思路和主要内容,对数字逻辑电路实验系统的三个主要部分:门电路和触发器基本应用实验、基于FPGA的数字系统综合设计实验、基于通用型中小规模数字器件的综合设计实验分别进行了改进和设计开发,实践结果证明该实验系统取得了较好的教学效果。This paper introduced the design and main content of a digital logic circuit experimental system. This digital logic circuit experimental system which includes three main contents： basic application experiments of logic gates and flip-flop, digital systems design experiments based on the FPGA, digital systems design and synthesis based on the general small or medium scale digital devices were improved and designed. The practice results show that the system has a better teaching effect.

关 键 词：教学改革 数字逻辑电路 实验系统 

分 类 号：G420[文化科学—课程与教学论]