Novel devices and process for 32 nm CMOS technology and beyond  被引量:1

Novel devices and process for 32 nm CMOS technology and beyond

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作  者:WANG YangYuan ZHANG Xing LIU XiaoYan HUANG Ru 

机构地区:[1]Institute of Microelectronics, Peking University, Beijing 100871, China

出  处:《Science in China(Series F)》2008年第6期743-755,共13页中国科学(F辑英文版)

摘  要:The development of next 32 nm generation and below needs innovations on not only device structures, but also fabrication techniques and material selections. Among those promising technologies, new gate structures as high-κ gate dielectric and metal gate, strain channel carrier mobility enhancement technology, and novel non-planar MOSFET structures are all possible candidate technologies. In this paper, we will specify our discussion on the research progress of high-κ-metal gate and non-planar MOSFET-technologies that are suitable to 32 nm technology node and beyond.The development of next 32 nm generation and below needs innovations on not only device structures, but also fabrication techniques and material selections. Among those promising technologies, new gate structures as high-κ gate dielectric and metal gate, strain channel carrier mobility enhancement technology, and novel non-planar MOSFET structures are all possible candidate technologies. In this paper, we will specify our discussion on the research progress of high-κ-metal gate and non-planar MOSFET-technologies that are suitable to 32 nm technology node and beyond.

关 键 词:CMOS technology HIGH-K metal gate non-planar MOSFET quasi-ballistic transport 

分 类 号:TN3[电子电信—物理电子学]

 

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