Recursive bisection placement algorithm with the predicted wirelength  

预测线长驱动的二分布局算法(英文)

作　　者：蒿杰[1] 马鸿[1] 彭思龙[1] 

机构地区：[1]中国科学院自动化研究所国家专用集成电路设计工程研究中心,北京100190

出　　处：《Journal of Southeast University(English Edition)》2008年第4期462-467,共6页东南大学学报（英文版）

基　　金：The National Key Project of Scientific and Technical Supporting Programs (No.2006BAK07B04)

摘　　要：To obtain a better placement result, a partitioning-based placement algorithm with wirelength prediction called HJ-Pl is presented. A new method is proposed to estimate proximity of interconnects in a netlist, which is capable of predicting not only short interconnects but long interconnects accurately. The predicted wirelength is embedded into the partitioning tool of bisection-based global placement, which can guide our placement towards a solution with shorter interconnects. In addition, the timing objective can be handled within the algorithm by minimizing the critical path delay. Experimental results show that, compared to Capol0. 5, mPL6, and NTUplace, HJ-P1 outperforms these placers in terms of wirelength and run time. The improvements in terms of average wirelength over Capo10. 5, mPL6 and NPUplace are 13%, 3%, and 9% with only 19%, 91%, and 99% of their runtime, respectively. By integrating the predicted wirelength-driven clustering into Capo10. 5, the placer is able to reduce average wirelength by 3%. The timing-driven HJ-P1 can reduce the critical path delay by 23%.为了有效提高布局质量,提出一种基于预测线长的二分布局算法HJ-Pl.该算法对长、短互连线都有很好的预测效果.通过将预测线长嵌入到布局框架中,使算法可以预先控制布局后可能产生的长互连线,有效降低它们在布局过程中被分割的几率,从而达到减小总线长的目的.另外,该算法通过最小化关键通路时延,得到了较好的时序优化效果.实验表明,与现有的Capo10.5,NTUplace和mPL6算法相比,该布局算法可分别减小线长13%,3%,9%.将预测线长目标集成到Capo10.5中可减小线长3%.带有时序驱动功能的HJ-Pl可以减小关键通路时延23%左右.

关 键 词：HIERARCHY INTERCONNECT PLACEMENT VLSI circuit wirelength prediction 

分 类 号：TP391.72[自动化与计算机技术—计算机应用技术]