电子封装技术的最新进展  

Recent Development of Electronic Packaging Technology

作　　者：傅岳鹏[1] 谭凯[1] 田民波[1] 

机构地区：[1]清华大学材料科学与工程系,北京100084

出　　处：《半导体技术》2009年第2期113-118,共6页Semiconductor Technology

摘　　要：现今集成电路的特征线宽即将进入亚0.1 nm时代,根据量子效应这将是半导体集成的极限尺寸,电子产品小型化将更有赖于封装技术的进步。概括总结了SiP三维封装、液晶面板用树脂芯凸点COG封装、低温焊接等技术的最新进展。并对SiP三维封装技术中封装叠层FFCSP技术进行了着重的阐述。指出随着低温焊接、连接部树脂补强以及与Si热膨胀系数相近基板的出现,电子封装构造的精细化才能成为可能,为各种高密度封装、三维封装打下坚实基础。The current IC line width characteristics is near sub-0.1 nm scale, according to the quantum effect, it will be the ultimate size of the semiconductor integration. The miniaturization process of electronic products will depend on the packaging technology. The current 3D SiP packaging technology, resin-core bump COG package on LCD panels, and low-temperature soldering are summarized. It also focuses on the 3D package-stack FFCSP packaging technology. The trend in development of electronic packaging technology is also pointed out, it reveals that the emergency of these technologies is the foundation for finer electronic packaging coming into reality.

关 键 词：系统封装 玻璃板上封装 挠性载带包覆芯片级封装 低温焊接 

分 类 号：TN305.94[电子电信—物理电子学]