光突发交换网络节点控制模块的硬件设计  

The hardware design of control module in the OBS network

作　　者：朱振华[1] 乐孜纯[2] 付明磊[1] 

机构地区：[1]浙江工业大学信息工程学院,杭州310032 [2]浙江工业大学理学院,杭州310032

出　　处：《光通信技术》2009年第1期12-15,共4页Optical Communication Technology

摘　　要：提出了一种OBS边缘节点控制模块的硬件设计方案,采用Just-in-time作为控制协议,在不同层次上使用并行结构来提高模块的吞吐量,并且还提出了Time Process Machine(TPM)来独立处理各种时间事件。整个方案以FPGA芯片作为硬件基础实现,在Quartus II软件上编译通过。A hardware design scheme of control module in the OBS edge node is reported in this paper. A parallel structure based on the different hierarchies is adopted for the sake of increasing the throughput. Just-in-time （JIT） is chosen as the control protocol and Time Process Machine （TPM） is proposed to deal with the time event. The design scheme bases on the FPGA chip and is compiled successfully in the Quartus Ⅱ software. Simulation results show that the scheme can accomplish the basic function of the control module preferably. Moreover, the working clock can get as much as 118MHz.

关 键 词：光突发交换 JUST in time 现场可编程门阵列 时间处理机 有限状态机 

分 类 号：TP393[自动化与计算机技术—计算机应用技术]