输出对CMOS反相器SEL特性的影响评估  

The Impact Evaluation of Output to SEL Characteristic of CMOS Inverter

作　　者：汪俊[1,2] 师谦[2] 邓文基[1] 

机构地区：[1]华南理工大学微电子所,广东广州510640 [2]电子元器件可靠性物理及其应用技术国家级重点实验室,广东广州510610

出　　处：《电子质量》2009年第2期47-50,共4页Electronics Quality

摘　　要：文中通过计算机模拟的方法分析了器件在不同输出电平时,CMOS反相器单粒子闩锁(SEL)特性的变化。通过对器件输出电平不同时,不同衬底的CMOS反相器进行仿真研究,我们得出,P衬底器件输出为高电平时比输出为低电平时得到的闩锁电流大,而N衬底器件在输出不同时,得到的闩锁电流大小相近。对于同种衬底的器件在输出不同时对SEL的敏感性几乎相同。在深亚微米的器件中,输出对器件SEL特性的影响均较大,需要在研究器件SEL特性时把其考虑在内。the article analyzed the SEL characteristic of CMOS inverter at different output condition through computer simulation method. Through simulation device of different output and substrate, we come to a conclusion that if the device is p-substrate, the latch up current is larger when the output is low level But if the device is n-substrate, the latch up current is similar, When the device at the condition of same substrate, regardless the output that the device sensitivity to SEL, is similar. The impact of output to device SEL characteristic will be larger when the devioe in the deep submicron stages, when we research the SEL characteristic of CMOS inverter, we must take into account of it.

关 键 词：单粒子闩锁 线能最传输 闩锁效应 电问锁 

分 类 号：TN386.1[电子电信—物理电子学]