BWA系统中判决反馈均衡器的ASIC实现  

ASIC implement of decision feedback equalizer in BWA system

作　　者：赵卫杰[1] 郑建宏 牛青[1] 

机构地区：[1]重庆邮电大学,重庆400065 [2]重邮信科股份有限公司,重庆400065

出　　处：《电子测试》2009年第2期87-90,共4页Electronic Test

摘　　要：随着集成电路日新月异的发展,体积和功耗以及实时性要求已经成为衡量集成电路好坏的重要指标。为了克服采用多片通用集成电路实现时,体积和功耗比较大,以及采用DSP实现时不能很好满足实时性的要求,本文针对无线宽带高速数据通信对实时性要求比较高的特点,采用SoC设计的方法,对BWA系统中判决反馈均衡器进行了ASIC实现。通过采用ASIC的实现方法,以及自顶向下的模块设计方法,很好地满足了下一代无线通信判决反馈均衡器对实时性要求,同时也满足了功耗和性能的要求。With the rapid development of IC, area and power-wastage have been two important targets to judge of IC performance. In order to get over the deficiencies in multi-chip design method and DSP design,this paper uses the design method of SoC to implement the decision feedback equalizer in BWA system which has a high real-time requirement. This method can well meet the real-time requirement. Meanwhile it also meet power-wastage and performance requirement.

关 键 词：自适应均衡 判决反馈均衡器 最小均方误差 ASIC 

分 类 号：TN715[电子电信—电路与系统]