二次正交解调算法及内建自测试的实现  

Implementation of quadratic orthogonal demodulation and built-in self test

作　　者：王刚[1] 乔纯捷[1] 王跃科[1] 

机构地区：[1]国防科技大学机电工程与自动化学院,湖南长沙410073

出　　处：《系统工程与电子技术》2009年第3期527-530,共4页Systems Engineering and Electronics

摘　　要：在阵列信号采集系统中,为了获得48路多频段高频窄带信号的特征,提出了阵列信号正交解调的方案。详细比较了实现正交解调的两种计算方法,提出了阵列信号的'二次正交解调'算法以实现系统的实时信号处理,并给出了在FPGA中阵列信号'二次正交解调'的实现方案。采用内建自测试的方法对'二次正交解调'模块和数据传输通道进行验证测试,在单频正弦信号的基础上叠加伪随机序列作为测试激励,DSP作为响应分析器验证信号特征。通过FPGA实现并验证了'二次正交解调'算法和内建自测试的有效性。In order to obtain the characteristics of 48 narrowband array signals, the method of orthogonal demodulation is presented, and two methods to realize it are compared. A quadratic orthogonal demodulation algorithm is put forward to decrease the demand of operation and memory resource so as to meet real-time processing, and the algorithm is realized by FPGA. A built-in self test （BIST） technology is used to test the quadratic orthogonal demodulation module and data transfer channels, which implements a sine wave adding pseudorandom sequence as test pattern generators. DSP works as a testing response analyzer to analyze signal characteristics. The result shows the effectiveness of the algorithm and BIST.

关 键 词：正交解调 内建自测试 测试信号生成 响应分析器 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]