基于FPGA的单精度浮点SVD处理器  

A Single Float-point Singular Value Decomposition Processor Based on FPGA

作　　者：杨垒[1] 窦衡[1] 

机构地区：[1]电子科技大学电子工程学院,四川成都610054

出　　处：《微电子学与计算机》2009年第4期189-192,共4页Microelectronics & Computer

摘　　要：为了提高数字信号处理中奇异值分解的实时处理能力,实现较大规模矩阵运算,采用Jacobi双边旋转算法,提出了一种基于FPGA的单精度浮点SVD处理器的实现结构.此结构充分考虑面积、速度和数值精度三个方面的因素,采用GA算法改进CORDIC算法,提高关键模块数值精度和处理速度,并利用双平面旋转和FPGA中DSP单元加速矩阵计算速度,免去了对最后结果的修正,实验测试结果显示了结构的高效性.A new architecture of single float-point SVD processor is proposed to improve the real-time processing ability in digital signal processing application and compute a large SVD, which is based on the implementation of two-sided Jacobi algorithm on FPGA. This architecture sufficiently considers area-consuming, performance and accuracy, and uses CORDIC unit based on GA algorithm to improve the aecuracy and performance of the key module. Moreover, the applica- tion of two-plane rotation and FPGA＇s DSP units farther improves the hardware＇s performance, and avoids revising the result by scale factor. The experiment demonstrates the proposed architecture is efficient.

关 键 词：浮点单精度 SVD GA CORDIC 双平面旋转 

分 类 号：TP33[自动化与计算机技术—计算机系统结构] TN4[自动化与计算机技术—计算机科学与技术]