伪随机交织器的FPGA设计与实现  

FPGA Design and Implementation of Pseudo-random Interleaver

作　　者：覃永新[1] 陈文辉[1] 吴其琦[1] 

机构地区：[1]广西工学院电子信息与控制工程系,广西柳州545006

出　　处：《通信技术》2009年第6期21-23,共3页Communications Technology

摘　　要：首先分析了伪随机交织器在Turbo码中的重要作用,讨论了交织器的设计准则,给出了一种采用m序列的伪随机交织器的硬件电路实现方案。设计中利用Matlab平台上的DSP Builder工具实现伪随机算法,并基于开发软件QuartusⅡ进行了程序设计、功能仿真和综合。该交织器具有易于实现、占用硬件资源少、适应数据可靠性传输等优点。This paper first analyzes the important role of pseudo-random interleaver in Turbo code, discusses the implementation of pseudo random interleaver based on m-sequence. The pseudo-random algorithms is achieved by using Matlab DSP Builder tool, and the program design, function simulation and integration are carried out by using Quartus Ⅱ tool. This pseudo-random interleaver is easy in implementation, occupies less hardware resources, and satisfies to the reliability requirement of data transmission, etc.

关 键 词：伪随机交织 现场可编程逻辑器件 DSP BUILDER 最大长度线性移位寄存器序列 

分 类 号：TN914.3[电子电信—通信与信息系统]