粗粒度可重构平台中循环自流水硬件实现  

The Implementation of Loop Self-Pipelining with Supports in Hardware for Coarse-Grained Reconfigurable Platform

作　　者：徐进辉[1,2] 杨梦梦[2] 窦勇[1] 周兴铭[1] 

机构地区：[1]国防科学技术大学计算机学院,长沙410073 [2]解放军信息工程大学电子技术学院,郑州450004

出　　处：《计算机学报》2009年第6期1080-1088,共9页Chinese Journal of Computers

摘　　要：循环流水技术运用于粗粒度可重构体系结构可带来显著性能提升.循环控制、流水线同步和存储器有效利用是其中的关键问题.文中介绍了在粗粒度可重构体系结构LEAP上循环自主流水化的硬件实现.该方法基于支持循环迭代自动调度的控制部件、数据驱动ALU和可配置静态交换路由.利用动态调度循环中操作的优势,LEAP可发掘更高的程序并行度;分布式存储访问和高效数据重用则提高了带宽利用率.实验结果表明,相对于通用处理器,LEAP有13.08～535.65倍的性能提升.Loop pipelining usually leads to significant performance improvements m coarsegrained reconfigurable architectures. Loop scheduling methods, synchronization of pipelines and measures efficiently utilizing the memory bandwidth are the key issues of loop pipelining techniques. This paper introduces the implementation of loop self-pipelining with supports in hard- ware on LEAP, which based on the hardware supporting automatically loop-iteration scheduling, data-driven ALU and configurable switch routers. Taking the advantages of dynamically scheduling iteration operations, LEAP exploits high degree of parallelisms. With the help of distributed memory access and efficiently data reusing of producer-consumer between computing elements, LEAP improves the bandwidth utilization. The experimental results show that the speedup over general processor can reach 13.08 to 535.22.

关 键 词：粗粒度可重构 循环自主流水 循环迭代控制 数据驱动 静态交换路由 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]