基于NiosⅡ/SOPC的嵌入式数字IC测试  

Embedded Digital IC Testing Based on NiosⅡ/SOPC

作　　者：宋跃[1] 利剑清[1] 胡升平[1] 

机构地区：[1]东莞理工学院电子工程系,广东东莞523808

出　　处：《仪表技术与传感器》2009年第6期68-69,72,共3页Instrument Technique and Sensor

基　　金：广东省工业攻关计划(2006A10102004);东莞市2006年科技计划项目(第2批序号11);东莞市科研发展专项资金项目(2005D040)

摘　　要：为实现数字IC故障检测的SOPC设计,在Altera-Cyclone EP1C6Q240中嵌入软核处理器NiosⅡ,用继电器EC2-5NW2阵列完成各引线的通用控制,在NiosⅡ控制下离线完成了对常用TTL74/54、CMOS 4000/4500系列常用数字IC芯片故障检测。文中详细介绍了系统结构、引脚控制,讲述了NiosⅡ-FPGA/SOPC的设计思想和实现方法。实验效果好,实践表明该设计是切实可行的。A design was introduced to realize SOPC design of digital IC error detection, in which soft core processor Nios Ⅱ was embedded in Ahera-Cyclone EP1 C6Q240, EC2-5 NW2 array to accomplish fuse control for common pins. It could test the error for common chips such as the series of TTL 74/54 and CMOS 4000/4500 off-line by Nios Ⅱ. The system structure and control of pin were mainly discussed, the Nios Ⅱ - FPGA/SOPC design principle and realizing method were also presented. The experiment effect was good, the practice showed the design was feasible.

关 键 词：数字IC检测 FPGA/SOPC 软核处理器NiosⅡ 智能控制 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置] TM935[自动化与计算机技术—控制科学与工程]