高速高精度流水线ADC的快速仿真方法研究  

Fast Simulation of High-Speed and High-Resolution Pipelined ADC

作　　者：卫宝跃[1] 周玉梅[1] 

机构地区：[1]中国科学院微电子研究所专用集成电路设计实验室,北京100029

出　　处：《微电子学》2009年第4期457-460,共4页Microelectronics

摘　　要：设计了一种可以与晶体管跨导运算放大器特性高度比拟的运放宏模型。用该宏模型替换采样/保持电路和MDAC模块中的晶体管级放大器电路,进行FFT分析;在仿真结果相差3.2%的情况下,仿真时间为原来的1.7%,大大缩短了流水线ADC的验证周期。在该方法的指导下,设计了一个10位20 MS/s流水线A/D转换器。在2.3 MHz输入信号下测试,该A/D转换器的ENOB为8.7位,SFDR为73 dBc;当输入信号接近奈奎斯特频率时,ENOB为8.1位。A SPICE macro model that captures the ＂personality＂ of operational trans-conductance amplifier was developed. Transistor level amplifier in SH and MDAC was replaced with the macro model to construct a new circuit/macro-model mixed ADC. FFT results showed that, compared with transistor level ADC, simulation time of the circuit/macro-model mixed ADC was reduced to 1.7% within 3. 2% precision error, and validation cycle was also greatly reduced.

关 键 词：A/D转换器 流水线A/D转换器 宏模型 

分 类 号：TN432[电子电信—微电子学与固体电子学] TN792