用扫描链重构来提高EFDR编码的测试压缩率和降低测试功耗  

Improve Test Compression Ratio and Reduce Test Power of EFDR Codes by Scan Chain Reconfiguration

作　　者：方昊[1,2] 宋晓笛[1,2] 程旭[1,2] 

机构地区：[1]北京大学计算机科学与技术系,北京100871 [2]北京大学微处理器研究开发中心,北京100871

出　　处：《计算机辅助设计与图形学学报》2009年第9期1290-1297,共8页Journal of Computer-Aided Design & Computer Graphics

基　　金：国家"八六三"高技术研究发展计划(2006AA010202)

摘　　要：为了解决系统芯片测试中日益增长的测试数据和测试功耗的问题,提出一种不影响芯片正常逻辑功能的扫描链重构算法——Run-Reduced-Reconfiguration(3R).该算法针对扩展频率导向游程(EFDR)编码来重排序扫描链和调整扫描单元极性,重新组织测试数据,减少了游程的数量,从而大大提高了EFDR编码的测试压缩率并降低测试功耗;分析了扫描链调整对布线长度带来的影响后,给出了权衡压缩率和布线长度的解决方案.在ISCAS89基准电路上的实验结果表明,使用3R算法后,测试压缩率提高了52%,测试移位功耗降低了53%.The increasing test data volume on-a-chip. This paper proposes a scan and test power are two major problems in testing system chain reconfiguration algorithm named Run-Reduced Reconfiguration （3R） . Without impacting normal functions of the chip, the 3R algorithm reconfigures scan chains by reordering chains and adjusting cells＇ polarities to reduce the number of runs in order to improve test compression ratio and reduce test power. Also, the paper discusses the trade off between compression ratio and scan chain wire length. The experimental results show that after executing 3R algorithm the compression ratio is improved by 52% and the scan power is reduced by 53%.

关 键 词：测试数据压缩 测试功耗 游程编码 扫描链排序 

分 类 号：TP391.76[自动化与计算机技术—计算机应用技术]