基于FPGA二次群分接器的实现  

Realization of secondary group demultiplexer based on FPGA

作　　者：刘福奇[1] 拱息发[1] 陈平[1] 

机构地区：[1]中国电子科技集团公司第三十四研究所

出　　处：《电子技术（上海）》2009年第9期77-78,80,共3页Electronic Technology

摘　　要：提出了一种二次群的分接器的实现方法。分析了二次群的帧结构,二次群分接的各个组成部分,包括帧头捕获、帧丢失告警、基群信号提取、去除插入码、负码速调整等二次群分接的关键技术。实现上述功能的VHDL语言的程序段。该设计在FPGA中实现简单,占用资源少,取得很好的应用效果。This paper presents an implementation of demultiplexer of secondary group. It Analysis the frame structure of the second group, and various components of the demultiplexer, including the header capture, frame loss alarm, based group signal extraction, removing the inserting code and adjustment of negative code speed. It presents the VHDL language program segment to achieve the above features. The design in the FPGA is easy to realize, and it uses few resources. It is available to obtain good results.

关 键 词：FPGA 二次群 分接 码速调整 VHDL 

分 类 号：TN791[电子电信—电路与系统] TN914.3