一个基于Hopfield神经网络的双层布线通孔最少化算法  

A Hopfield Neural Network Approach to Two-layer Constrained Via Minimization

作　　者：马琪[1] 严晓浪[2] 胡卫明[2] 

机构地区：[1]杭州大学电子工程系 [2]杭州电子工业学院CAD所

出　　处：《电路与系统学报》1998年第3期59-64,共6页Journal of Circuits and Systems

摘　　要：本文在布线的群图模型基础上，利用离散型Ｈｏｐｆｉｅｌｄ神经网络解决群图的最大割问题，并着重论述了如何跳出局部优化点的问题，从而较好地解决了双层布线通孔最少化问题。算法考虑了许多来自实际的约束，并进行大量的布线实例验证。The constrained via minimization problem in VLSI/PCB routing is to determine which layers can be used for routing the wire segments such that the number of vias can be minimized.In this paper,we present a new approach for two-layer via minimization by means of discrete Hopfield neural network on the basis of weighted cluster graph model.In addition,many physical constraints are taken into consideration here.The results of experinments indicate that our algorithm is very efficient and encouraging.

关 键 词：VLSI 通孔最少化 最大割 神经网络 详细布线 

分 类 号：TN470.597[电子电信—微电子学与固体电子学] TP18[自动化与计算机技术—控制理论与控制工程]