考虑工艺波动影响的RLC互连统计延时  

Statistical RLC Interconnect Delay Considering Process Variations

作　　者：李建伟[1] 董刚[1] 杨银堂[1] 王增[1] 

机构地区：[1]西安电子科技大学宽禁带半导体材料与器件教育部重点实验室,西安710071

出　　处：《电子与信息学报》2009年第11期2767-2771,共5页Journal of Electronics & Information Technology

基　　金：国家自然科学基金(60606006);国家杰出青年基金(60725415);重点实验室基金(9140C030102060C0303)资助课题

摘　　要：该文提出了一种考虑工艺波动的统计RLC互连延时分析方法。文中首先给出了考虑工艺波动的寄生参数和矩的构建方法,然后基于Weibull分布给出了RLC互连的统计延时模型。所提方法同样适用于已有的延时模型如Elmore模型,等效Elmore模型和D2M模型。通过对几种模型的比较,表明,基于Weibull分布的RLC互连的统计延时模型是最精确的,和HSPICE相比,50%延时误差最大0.11%,蒙特卡洛分析中的均值和平均偏差误差最大2.02%。Analysis of RLC Statistical delay considering process fluctuation is presented in this paper.Construction of parasitic parameters and moments with process variation is first given,and then a statistical delay model based on Weibull distribution is achieved.The proposed method is also applied to the other available delay such as Elmore,equivalent Elmore and D2M.For the statistical delay model based on Weibull distribution,compared with HSPICE,results show that the maximum error of 50% delay is 0.11%,the maximum error of mean and the average in Monte Carlo analysis is 2.02%.

关 键 词：集成电路 工艺波动 RLC互连延时 统计模型 WEIBULL分布 

分 类 号：TN405.97[电子电信—微电子学与固体电子学]