数字逻辑电路教学实践中故障排查的研究  

Study of the fault reducing and clearing on digital logic circuit teaching practice

作　　者：翟杏薇[1] 

机构地区：[1]天津理工大学计算机与通信学院,天津300191

出　　处：《实验室科学》2009年第6期175-177,共3页Laboratory Science

基　　金：天津市科技支撑计划项目(09ZCKX00100)

摘　　要：数字逻辑课程是学习计算机的重要专业基础课,数字逻辑电路实验通过分析、设计、调试数字逻辑电路,更好更快地掌握本课程的理论和实际操作。该文通过对教学实践中出现的故障从理论上进行分析、研究和总结,并应用到实践中,使学生在学习实践中正确掌握实验方法,尽量减少故障的发生并及时排除故障。Digital logic is an important basic course in professional computer learning. By analyzing,designing and debugging in digital logic circuit experiments, students can grasp the theory and practice operation quickly. Based on the theory, the paper analyses, studies and summaries the faults that appeared in teaching practice. The researching results have been applied in helping students to get correct experiment methods, reducing rate of fault generation as much as possible and clearing it in time. In practical application, excellent effects have been realized.

关 键 词：数字逻辑电路 故障 计算机专业 

分 类 号：TN431.2[电子电信—微电子学与固体电子学]