SOI-LIGBT寄生晶体管电流增益的研究  

Study on the Parasitic Transistor Current Gain of SOI-LIGBT

作　　者：陈越政[1] 钱钦松[1] 孙伟锋[1] 

机构地区：[1]东南大学国家专用集成电路系统工程技术研究中心,南京210096

出　　处：《半导体技术》2010年第1期54-57,共4页Semiconductor Technology

摘　　要：采用二维器件模拟仿真软件Tsuprem4和Medici模拟了SOI-LIGBT的n型缓冲层掺杂剂量、阳极p+阱区长度、漂移区长度以及阳极所加电压对SOI-LIGBT寄生晶体管电流增益β的影响,通过理论分析定性的解释了产生上述现象的原因和机理,并且通过实验测试结果进一步验证了分析结论的正确性。其中,n型缓冲层掺杂剂量对电流增益β的影响最为明显,漂移区长度的影响最弱。基本完成了对SOI-LIGBT寄生晶体管电流增益β主要工艺影响因素的定性分析,对于SOI-LIGBT的设计有一定的借鉴意义。The effects of n-buffer implantation dose, anode p＋ well length, drift length and anode voltage on current gain β of parasitic transistor in SOI-LIGBT （silicon-on-insulator lateral insulated gate bipolar transistor） were simulated by 2D device simulators Tsuprem4 and Medici. Causes and mechanism of these phenomena were explained qualitatively according to theoretical analysis. Above analysis conclusions were further verified by experimental test results. The n-buffer implantation dose affects the current gain β seriously and of the current length. the influence produced gain β are qualitative by the drift length is analyzed which has not obvious. The main technological reference value to SOI-LIGBT device process factors design ; drift length.

关 键 词：绝缘体上硅横向绝缘栅双极型晶体管 电流增益β n型缓冲层 漂移区长度 

分 类 号：TN386.2[电子电信—物理电子学]