AVS解码器帧内预测模块硬件优化设计  

Optimized Implementation of Intra Predictor for AVS Decoder

作　　者：黄友文[1] 陈咏恩[1] 

机构地区：[1]同济大学通信研究所,上海200092

出　　处：《小型微型计算机系统》2010年第1期183-185,共3页Journal of Chinese Computer Systems

摘　　要：根据AVS标准中的帧内预测算法特点提出一种用于AVS解码器的帧内预测硬件模块优化设计方案,该设计使用两维滤波单元对参考数据进行处理,每个块的帧内预测运算在8个时钟周期内完成.与此同时,结合寄存器的移位操作简化参考数据选择机制,避免大量高位宽数据选择器的使用,减少资源的消耗.综合结果表明,该设计满足高清图像的实时解码需求.An optimized implementation of intra predictor for AVS decoder was proposed according to the algorithms in the AVS spec- ification. Two-Dimensional （2-D） filters were used in the design, and intra prediction for each block could be finished in 8 cycles. Data selection complexity was reduced by data shifting between registers. Lots of multiplexers were saved. The synthesis result indicated that the design could be used for real-time decoding of high-resolution videos.

关 键 词：AVS标准 视频解码 帧内预测 硬件设计 

分 类 号：TN919.81[电子电信—通信与信息系统]